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AQ: Soft start motor tripped in fuel oil suction and discharge

First of all check all the component i.e.CB, CT, Heat Element, and the O/L setting then megger the motor to be shore that there is no problem with the motor winding insulation.
After that let the mechanical check the vibration analyses during the start-up also measure the startup currant of the motor and diffidently you will find where is the problem.
It could be a relay setting; or problem in the insulation; or even a problem in the motor itself.

On the other hand, check the motor on No Load condition and tune it to the Soft starter before coupling it to the pump.
Auto Tuning feature is generally inbuilt to Advanced soft starters.
If the No load startup of the motor is perfect, 2 causes arise:
1) Improper design.
2) Viscosity _ this can be tackled if you can make some temporary arrangement for pre-heating to confirm if this is the culprit.

As using soft starter could result in reducing torque of the motor. Soft starter normally reduces starting current by reducing starting voltage. However, decreasing voltage will lead to starting toque reduction. Hence, the motor may take longer time, especially when driving high-inertia load, with somewhat high current until it reach its full speed. Using an inverter will help you get full starting torque or even boost up it to 150-200% while keeping starting current at 150-200% of full load. Installation of heat tracing might also help and economic.

Assuming it is an electrical problem. On a motor of this size it has separate overload protection from the ground fault and short circuit protection. There are tolerance levels for motor that you may not be within. However a megger will not answer all the possibilities with motors unless you are ready to perform polarization index test etc….A power analyzer will allow you to see the operation in real world application. Assuming you have confirmed this is an electrical problem your next step would be to use a power analyser. You should be able to confirm by the signature and different placements of the analyzer the problem. Analyzer should be around all three phases.

AQ: Popularization of SPICE

I am currently writing a bullet point history of the popularization of SPICE in the engineering community. The emphasis is on the path SPICE has taken to arrive on the most engineering desktops. Because of this emphasis, my history begins with the original Berkeley SPICE variants, continues onto PSpice (its limited, but free student version made SPICE ubiquitous) and culminates with LTspice (because, at over three million downloads, it has reached many more users than all other SPICE variants combined).

I have contacted Dr. Laurence Nagel (the father of Berkeley SPICE) and Mike Engelhardt (LTspice) in order to verify the accuracy of the historical account (haven’t had a chance to fold in Dr. Nagel’s corrections yet), but I am lacking solid information about the beginnings of PSpice (I don’t even know who the technical founders of MicroSim were). Ian Wilson was an early technical V.P. Also, I am not sure what the PSpice acronym means. (Seems to me that it started out as uPspice?)

Here is what I have recently found about PSpice (more info appreciated):

User’s Guide to PSpice, Version 4.05, January 1991
From Chapter 1: INTRODUCTION, Section 1.1 Overview, starting with paragraph 2 (page 3):

“PSpice is a member of the SPICE family of circuit simulators. The programs in this family come from the SPICE2 circuit simulation program developed at the University of California at Berkeley during the early 1970’s. The algorithms of PSICE2 were considerably more powerful and faster than their predecessors. The generality and speed of SPICE2 led to its becoming the de facto standard for analog circuit simulation. PSpice uses the same numeric algorithms as SPICE2 and also conforms to the SPICE2 format for input and output files. For more information on SPICE2, see the references listed in section 13.2.1.4 (page 427, especially the thesis by Laurence Nagel.

“PSpice, the first SPICE-based simulator available on the IBM-PC, started being delivered in January of 1984.

“Convergence and performance is what sets PSpice apart from all the other ‘alphabet’ SPICEs. Many SPICE programs became available on the IBM-PC around mid-1985, after Microsoft released their FORTRAN complier version 3.0. For the most part, these SPICEs are little modified from the U.C. Berkeley code. Using benchmark circuits, we find that PSpice runs anywhere from 1.3 to 30 times faster than our imitators. In the area of convergence, PSpice has a two-year lead in improving convergence and a customer base that is larger than all of the other SPICE vendors combined (including those SPICEs offered for workstations and mainframes). This larger customer base provides more feedback, sooner, than any other SPICE program is likely to receive.”

From Chapter 1: INTRODUCTION, Section 1.4 Standard Features, last paragraph (page 7):

“PSpice, version 3.00 (Dec. 1986) and later, is a complete re-write of the simulator into the ‘C’ pro-gramming language. It is not a version of SPICE3, from U.C. Berkeley, which is also written in ‘C’. MicroSim has overhauled the data structures and code, however the analog simulation algorithms are similar and the numeric results are consistent with SPICE2 and SPICE3. Having the simulator re-written in ‘C’ allows faster development, allowing our team to reliably modify and extend the simulator in sev-eral directions at once.”

From the January 1987 Newsletter: PSpice went from version 2.06 (Fortran) to version 3.00 (C). Speed increased by 20%. PSpice 3.01 (Dec 86) introduced the non-linear Jiles and Atherton core model.

From the April 1987 Newsletter: PSpice 3.03 (Apr 87) introduced ideal switches.

From the July 1991 Newsletter: PSpice announced Schematics at the June 1991 Design Automation Conference. (Became available when PSpice 5.0 shipped in July 91?)

Solving Differential Equations with Mic

AQ: Improve PF of pumping motor with soft starter controlled

I have 3 pumping motors of 1750 kw 6.6kv, with soft starter they are maintaining a pf of .96-.97. Now I want to install HT capacitors to use these motors in d.o.l, can I take the pf to .99 by using this?

If you are using soft starters now, do not take them out. These are really large motors and starting them across the line is not a good idea. The utility serving you should have designed their service based on you having soft starters for these motors. They probably also have a stipulation stating that you cannot start them all at the same time. Starting one or more them across the line may cause the utility’s transformer fuses to fail. Even if it doesn’t, the flicker may cause other processes in your facility to trip. Especially drives or undervoltage relays in MCC’s.

The only reason to install caps at this point would be to correct for power factor. Since your pf is .96 it will take years if not decades to get a return on your investment (ROI). My utility does not charge a pf penalty until you drop below .90. And even then, it is usually not worth installing a cap bank unless you are under .85 and correct to >.95. Most customers require a 3 to 5 year ROI and you will never get that. We always recommend designing for a .95 pf to leave some “headroom”. So, your existing design sounds like it is correct. Your company may also have a “kva rate” instead of a “kw rate” with the utility. Check with your utility marketing rep to verify what type rate you are own and to help you evaluate your ROI.

Also, when you install a capacitor bank you have to make sure that you do not hit a resonant harmonic frequency. You will have to get the utility involved to give you the short circuit data at the PCC (point of common coupling). If the calculated harmonic resonant point is near the 3,5,7,11 or 13 harmonic, you will need a harmonic filter installed in conjunction with the capacitor bank. That means more money and a longer ROI.

AQ: Simulator history

Power electronics has always provided a special challenge for simulation. As Hamish mentioned above, one of the problems encountered is inductor cutsets, and capacitor loops that lead to numerical instability in the simulation matrices.

In the 80s, Spice ran so slowly that is was not an option unless you wanted to wait hours or days for results, and frequently it failed to converge anyway. It was never intended to handle the large swings of power circuits, and coupled with the numerical problems above, was just not a feasible approach.

Ideal-switch simulations were used with other software to get rid of many of the nonlinearities of devices that slowed simulation down, but Spice really hated ideal switches as it would try to converge on the infinite slope edges.

Three universities started writing specialized software for converter simulation to address this shortcomings of Spice. Virginia Tech had COSMIR, which I helped write with a grad student, Duke University had the program which later became Simplis, and the University of Lowell had their program, the name of which I don’t recall (anyone remember?).

All of these programs started before Windows came along, and they were fast and efficient. With windows, the programming overhead to maintain programs like these moved beyond the scope of what university research groups in power electronics could handle. Only the Duke program survived, with Ron Wong leading the effort at a private company. The achievements of Simplis are remarkable, but it is a massive effort to keep this program going for a relatively small marketplace (power supply companies are notoriously cheap, so the potential market does not get realized), and that keeps the price quite high. If you can afford it, you should have this program.

Spice now runs at a reasonable pace on the latest PCs, so it is back in the game. LT Spice is leading the charge because it is free, and the models are relatively rugged. Now that speed is less of a factor, you can put real switches in, and Spice can handle them in a reasonable amount of time. (Depending on your definition of “reasonable”.)

PSIM was another ideal switch model, and they eliminated the convergence headaches that plagued all the other programs by not having convergence at all. You just cut the step size down to get the accuracy you needed, and this worked fine for exploring power stages and waveforms, but was not good for fast transient feedback loops. As the digital controller people quickly realized, the resolution on the PWM output needed to avoid numerical oscillations is very fine, and PSIM couldn’t handle that without slowing down too much.

When I left Virginia Tech, I felt the bulk of the industry needed a fast simulation and design solution so engineers did not have to add to their burdens with worrying about convergence and other problems. This is a hardware-driven field, and we all have our hands full dealing with real life blowups that simulation just doesn’t begin to predict.

I have observed in teaching over the years that engineers in a hurry to get to the hardware have very little tolerance for waiting for simulation. If you are building a well-known topology, about 2 seconds is as long as they will wait before they become impatient.

This is the gap that POWER 4-5-6 plugs. The simulation is practically instantaneous, and the program has no convergence issues so you design and simulate rapidly before moving to a breadboard. It is intended for the working engineer who is under severe time pressure, but would like some simulation to verify design integrity.

AQ: Avoid generator overload

Two buses of 11kv, 750MVA, 3000A each fed by a transformer of 40MVA and connected through a tie breaker, now connect a generator of 18MW,11kv, 0.8 PF. How to avoid overloading?

The generator is being used as a backup power source in case utility power is lost, based on such info presented, you are going to have a hard time getting this to work with only ONE 18MW gen. In order to connect the 18MW gen to both buses, the total demand should not be more than 80% of 18MW or 14.4MW at .8 power factor. For short run times (10 or 15 minutes), you can load the gen up to 90% for continuous load, but for long run times, you need to keep it at 80%.

Demand is the diversified connected load. Not all 54.22MVA of connected load will be on at the same time, so this is why you “diversify” the load to get your actual demand load. You can look at your power bill or call your utility to find out your total demand. Or you can install a power quality monitor for a couple of weeks to get it.

A general rule of thumb is to assume that 67% of the connected load will be your demand load. But this depends on your operation. Based on this, one generator will not be sufficient for BOTH buses. However, if you are supplying each bus with its own generator, you may be ok.

Another issue is motor starting flicker. Make sure your generator can start your largest motor and that your disconnect breaker or fuses can handle the inrush. I have seen this as an issue, especially when soft starters are used. Soft starters lower the inrush by exploiting the time characteristic. If the soft starter settings do not bring the motor up to speed quickly enough, the overload trip setting on your generator may trip.

The bottom line is, you are going to have to look at this installation much closer in order to make this work with one 18MW gen. You may even have to disconnect some load when you are running on generator.

AQ: Power electronics design

If you are interested in power electronics design at the board or system level, I would recommend LTspice (note the correct spelling) by far above all the others. In addition to being superb for IC design (Linear Tech uses LTspice to design all their own ICs), it also has been specifically designed to run board level, switched mode simulations.

Because of its robust, excellent performance and because it is available at zero cost, LTspice has become the de facto standard SPICE with by far more engineers using it than any other flavor of SPICE. LTspice allows 100 percent transportability and work sharing, i.e., anyone, even those who have not been previous users, can open your files and run your simulations (the free download is well under 10Mb, installs very quickly and is very system friendly – not cookies, messy registry alterations, scattering of installation folders, etc. – removal, if you so choose, is easy and complete).

Like most versions of SPICE today, LTspice has a fine user interface, but that feature should be low on your list. Schematic entry is NOT where you will be spending most your time when doing serious design work. Beyond a point, desktop eye-candy does nothing to help you understand your design and see its flaws and weaknesses (in fact, too many layers of hand holding can just get in the way of that).

Personally, I never breadboard a design anymore until it has proven itself in LTspice (unlike with a breadboard, a simulated circuit’s internals are ALL easily viewable – a great boon for understanding tricky operation). For me, first hardware is always a complete layout (and matches the simulation every time). Of course, the old axiom “garbage-in, garbage-out” very much applies, which means I often spend a lot of upfront time verifying (and modifying and/or making) models to match their components’ data sheets. In fact, I would recommend doing that as a very worthwhile exercise and as something that should impress a potential employer.

When developing a design in SPICE, you will want to spend your time debugging your design, not your simulation or your simulator, therefor it is worthwhile to learn what a simulator needs to run smoothly (with LTspice, all that means is that the input has to be realistic). It was years of working with simulators and a lot of sweat and aggravation before the keys to problem-free simulations gradually crept into my understanding.

1. If possible, make all nonlinear circuit elements be functionally continuous with continuous derivatives (this is not possible for some component behaviors), and

2. *always* craft your simulations so that the nonlinear bits become linear at high frequencies (this is always possible). Non linear devices should never be strict voltage sources. They should be Nortonized and be shunted with small capacitances such that the capacitances (which are linear elements) dominate at small time steps.

3. Always verify that the building blocks of your simulation behave realistically (GIGO).

Follow these guidelines and you will never see the “time step too small” message (I have never met a simulation that couldn’t be made to run well). Note that many (if not most) vendor supplied models fail to meet these guidelines and will give you nothing but headaches if you try to use them “as is.”

AQ: High current intensity harmonics [%THD (A)] in several motors?

Most electric motors that suffer variations in Load already have variable frequency drives, we have capacitors installed in general switchboard to correct the reactive energy and so on. I did a discretization of the electrical consumption by product type, during this energy survey I noticed that in most motors Amperage THD was high, above 40%. I would like to know what effect does it have on efficiency and possible causes and solutions.

One more thing, when is it profitable to substitute motors by high efficiency motors? Because in the transport system I have about 60 electric motors below 10HP with a power factor of 0,6 , I was thinking in installing a capacitor in the switchboard of the transport system.

Variable frequency drives and other power electronic loads will draw harmonic currents from the power source. More VFDs, UPSs, rectifiers, etc means more harmonic current. When harmonic current flows through system impedance, it causes harmonic voltage to be present on the power system. That means there are essentially harmonic voltage sources at each harmonic frequency and therefore loads will draw current (harmonics) at each one of those frequencies. PF Capacitors offer a low impedance path to harmonics (attracting them) and may be damaged when connected to a system with harmonic producing loads. It is also possible for capacitors to cause a resonance condition whereby the harmonics can be amplified. Consider detuned capacitors (with harmonic blocking reactors) or addition of harmonic filters. There are several alternative methods of filtering the harmonics.

AQ: Calculate current setting of overcurrent relay

You can calculate current setting of overcurrent relay by using next expression:

Isetting ≥ (ks*Imaxopam)/(a*pi)
Imaxopam=kam*Imaxoptr

where are:

Isetting-current setting of overcurrent relay
ks-safety coefficient
Imaxopam-maximum operational current under which overcurrent relay shouldn’t to act
a-coefficient of layoffs overcurrent relay (0,85-0,95)
pi-ratio of current transformer
kam-coefficient which describes influence of common starting of all asynchronous electrical motors in the appropriate power network after elimination of fault (1-6)
Imaxoptr-maximum operational current of power transformer

Besides I have already explained meanings of all appropriate sizes, I would like to underline differentiate between Imaxopam and Imaxoptr.
Imaxoptr is maximum operational current of power transformer in normal conditions while Imaxopam is maximum operational current of power transformer after interruption of fault and mentioned current includes influence of common starting of all asynchronous electrical motors in the appropriate power network after elimination of fault. It is very important to say that appearing of fault in power network leads to significant decreasing of voltage what has a consequence deceleration of all asynchronous electrical motors in appropriate power network. After interruption of fault, it comes to appearing of process during which all asynchronous electrical motors are starting in some parts of power network which are still turned on. This is situation which is significant different from situation where asynchronous electrical motors are starting one by one while in this case all asynchronous electrical motors are starting at the same time. Because of this fact, after elimination of fault, value of current isn’t same as value of current before appearing of fault. After elimination of fault, value of current, which I called Imaxopam, is higher than value of operational current of power transformer, which I called Imaxoptr, but under those conditions there is no fault, so current setting of overcurrent relay should to be set on that value of current and mentioned relay shouldn’t act under those conditions.

After calculation of current setting of overcurrent relay, you need to check coefficient of sensitivity of acting of overcurrent relay by using next expression:

ksens=Ifmin/(Isetting*pi)

where are:

ksens-coefficient of sensitivity of acting of overcurrent relay
Ifmin-minimum fault current (1 phase fault to the earth or 2 phases fault)
Isetting-current setting of overcurrent relay
pi-ratio of current transformer

Value of coefficient of sensitivity of acting of overcurrent relay should to be higher or equal with 1,5 in case when is fault at opposite busbars (busbars where isn’t overcurrent relay) or higher or equal with 1,2 in case when is fault at the end of the longest feeder which begins at those opposite busbars. Time setting should to be selected like that overcurrent relay needs to wait acting of another protection which is on the feeders (for example distance protection).

AQ: Power supply prototypes is the best way to learn it

I have been designing power supplies for over 15 years now. We do mostly off line custom designs ranging from 50 to 500W. Often used in demanding environments such as offshore and shipping.
I think we are the lucky ones who got the chance to learn designing power supplies using the simple topologies like a flyback or a forward converter. If we wanted to make something fancy we used a push-pull or a half bridge.

Nowadays, straight out of school you get to work on a resonant converter, working with variable frequency control. Frequencies are driven up above 250kHz to make it fit in a matchbox, still delivering 100W or more. PCB layouts get almost impossible to make if you also have to think about costs and manufacturability.
Now the digital controllers are coming into fashion. These software designers know very little about power electronics and think they can solve every problem with a few lines of code.

But I still think the best way to learn is to start at the basics and do some through testing on the prototypes you make. In my department we have a standard test program to check if the prototype functions according to the specifications (Design Verification Tests), but also if all parts are used within their specifications (Engineering Verification Tests). These tests are done at the limits of input voltage range and output power. And be aware that the limit of the output power is not just maximum load, but also overload, short circuit and zero load! Start-up and stability are tested at low temperature and high temperature.

With today’s controllers the datasheets seem to get ever more limited in information, and the support you get from the FAE’s is often very disappointing. Sometime ago I even had one in the lab who sat next to me for half a day to solve a mysterious blow up of a high side driver. At the end of the day he thanked me, saying he had learned a lot!
Not the result I was hoping for.

AQ: Conditional stability

Conditional stability, I like to think about it this way:

The ultimate test of stability is knowing whether the poles of the closed loop system are in the LHP. If so, it is stable.

We get at the poles of the system by looking at the characteristic equation, 1+T(s). Unfortunately, we don’t have the math available (except in classroom exercises) we have an empirical system that may or may not be reduced to a mathematical model. For power supplies, even if they can be reduced to a model, it is approximate and just about always has significant deviations from the hardware. That is why measurements persist in this industry.

Nyquist came up with a criterion for making sure that the poles are in the LHP by drawing his diagram. When you plot the vector diagram of T(s) is must not encircle the -1 point.

Bode realized that the Nyquist diagram was not good for high gain since it plotted a linear scale of the magnitude, so he came up with his Bode plot which is what everyone uses. The Bode criteria only says that the phase must be above -180 degrees when it crosses over 0 dB. There is nothing that says it can’t do that before 0 dB.

If you draw the Nyquist diagram of a conditionally stable system, you’ll see it doesn’t surround the -1 point.

If you like, I can put some figures together. Or maybe a video would be a good topic.

All this is great of course, but it’s still puzzling to think of how a sine wave can chase itself around the loop, get amplified and inverted, phase shifted another 180 degrees, and not be unstable!

Having said all this about Nyquist, it is not something I plot in the lab. I just use it as an educational tool. In the lab, in courses, or consulting for clients, the Bode plot of gain and phase is what we use.