AQ: How to suppress chaotic operation in a DCM flyback at low load
I would like to share these tips with everybody.
A current mode controlled flyback converter always becomes unstable at low load due to the unavoidable leading edge current spike. It is not normally dangerous but as a design engineer I don’t like to look at it and listen to it.
Here are three useful and not patented tips.
First tip:
• Insert a low pass filter, say 1kohm + 100pF between current sense resistor and CS input in your control IC.
• Split the 1kohm in two resistors R1 to the fet and R2 to the control IC. R1 << R2.
• Insert 0,5 – 1pF between drain and the junction R1/R2. This can be made as a layer-to-layer capacitor in the PCB. It does not have to be a specific value.
• Adjust R1 until the spike in the junction in R1/R2 is cancelled.
You will see that the current spike is always proportional to the negative drain voltage step at turn-on. Once adjusted, the cancellation always follows the voltage step, and you some times achieve miracles with it. Cost = one resistor.
Second tip:
Having the low pass filter from first tip, add a small fraction of the gate driver output voltage to the current sense input, say 0,1V by inserting a large resistor from ‘Drive Out’ to ‘CS input’. The added low pass filtered step voltage will more or less conceal the current spike. You should reduce your current sense resistor accordingly. Cost = one resistor.
Third tip:
In a low power flyback, you some times just need an RC network or just an extra capacitor from drain to a DC point, either to reduce overshoot or to reduce noise. Connect the RC network or the capacitor to source, not to ground or Vcc. If you connect it to ground or Vcc, you will measure the added discharge current peak in the current sense resistor. Cost = nothing – just knowledge.
All tips can be used individually or combined => Less need for pre-load resistors on your output.
